NDLI: Using information entropy bounds to design VLSI friendly neural networks

Content Provider	IEEE Xplore Digital Library
Author	Draghici, S.
Copyright Year	1998
Description	Author affiliation: Dept. of Comput. Sci., Wayne State Univ., Detroit, MI, USA (Draghici, S.)
Abstract	This paper presents a method for calculating the minimal size of a VLSI optimal network for a given problem. A VLSI optimal network is a network using integer weights in a given range [-p,p] and units with a small constant fan-in. The value p is a small integer which is calculated from the problem parameters such that the problem is guaranteed to have a solution. It is shown that the number of weights can be lower bounded in the worst case by the expression: m(n+1)[nlog(/sub dmin///sup dmx/)+(n-1)log(/sub dmin///sup 1/+1)+ 1/2 log(n-1)-/sub 12.(n-1)//sup loge/+c] where d/sub min/ is the minimum distance between patterns of opposite classes, d/sub max/ is the maximum distance between any patterns, m is the number of patterns in the largest class, n is the number of dimensions and c is a constant. The methodology is tested on various problems using a limited precision integer weights constructive algorithm.
Starting Page	547
Ending Page	552
File Size	701635
Page Count	6
File Format	PDF
ISBN	0780348591
ISSN	10987576
DOI	10.1109/IJCNN.1998.682326
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-05-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Information entropy Very large scale integration Neural networks Costs Neural network hardware Computer networks Laboratories Computer science Computer network reliability Heuristic algorithms
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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