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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ming-Dou Ker Hsin-Chin Jiang |
| Copyright Year | 2001 |
| Description | Author affiliation: Integrated Circuits & Syst. Lab., Nat. Chiao-Tung Univ., Taiwan (Ming-Dou Ker) |
| Abstract | On-chip electrostatic discharge (ESD) protection circuits are built in IC chips to protect the devices and circuits against ESD damage. But, ESD protection circuits constructed with scaled-down CMOS devices are very susceptible to ESD stress. Therefore, novel ESD protection solutions must be developed to overcome this reliability challenge for integrated circuits fabricated in nano-scale CMOS technology. The whole-chip ESD protection strategy for CMOS integrated circuits in nanotechnology has been proposed with two main methods. One is the substrate- triggered circuit technique used to effectively improve ESD robustness of devices in the nano-scale CMOS technology. The other is the novel design concept of "ESD buses" used to solve the internal ESD damage issue of CMOS IC with multiple and separated power lines. The internal circuits or interface circuits, realized by nano-scale CMOS devices, are more sensitive to such internal ESD damage issue. By using ESD buses, ESD current can be quickly discharged far away from the internal circuits or interface circuits of CMOS IC to achieve the goal of whole-chip ESD protection. |
| Sponsorship | IEEE Robotics & Autom. Soc. (RAS) |
| Starting Page | 325 |
| Ending Page | 330 |
| File Size | 1022475 |
| Page Count | 6 |
| File Format | |
| ISBN | 0780372158 |
| DOI | 10.1109/NANO.2001.966442 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-10-30 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Electrostatic discharge Protection CMOS integrated circuits CMOS technology Integrated circuit technology Nanoscale devices Stress Integrated circuit reliability Nanotechnology Robustness |
| Content Type | Text |
| Resource Type | Article |
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