NDLI: Multiple-valued logic design using multiple-valued EXOR

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Multiple-valued logic design using multiple-valued EXOR

Content Provider	IEEE Xplore Digital Library
Author	Hozumi, A. Kamiura, N. Hata, Y. Yamato, K.
Copyright Year	1995
Description	Author affiliation: Fac. of Eng., Himeji Inst. of Technol., Japan (Hozumi, A.; Kamiura, N.; Hata, Y.; Yamato, K.)
Abstract	An approach to logic minimization using a new sum operation called multiple valued EXOR is proposed. The paper introduces the multiple valued sum of products expression using the EXOR. As the scheme of the minimization, we utilize an idea based on neural computing. First, we demonstrate the method to minimize the binary EXOR of MINs expressions and show that the method is effective. Next, we apply the method to the three valued EXOR of MINs expression. Experimental results for all three valued two variable functions show that our proposed multiple valued EXOR of MINs expressions require fewer product terms than both the MAX of MINs and TSUM of MINs expressions.
Starting Page	290
Ending Page	294
File Size	542216
Page Count	5
File Format	PDF
ISBN	0818671181
ISSN	0195623X
DOI	10.1109/ISMVL.1995.513545
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-05-23
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic design Circuits Logic functions Logic testing Minimization methods Logic gates Neurons Computer networks Arithmetic Upper bound
Content Type	Text
Resource Type	Article
Subject	Mathematics Computer Science

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