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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Bei Na Wei Yu Shi Getian Ye Jie Xu |
| Copyright Year | 2008 |
| Description | Author affiliation: Sch. of Electr. Eng. & Telecommun., Univ. of New South Wales, Sydney, NSW (Bei Na Wei) || Nat. ICT Australia, Australian Technol. Park, Sydney, NSW (Yu Shi; Getian Ye; Jie Xu) |
| Abstract | Smart camera system design and implementation is a challenging task due to the constant need to perform computationally demanding image processing tasks with the limited resource constraints of embedded systems. This paper presents the hardware and software co-design and implementation of the first stage of TraffiCam, an FPGA based smart camera prototype for traffic surveillance at intersections, consisting of a CMOS image sensor capture device and FPGA main video processor. In particular, creative solutions for balancing gate array utilization, memory and computation time are presented for the initial stage of Harris keypoint detection with discussions on the algorithm implementation conversions between PC-based to FPGA based platforms. Preliminary results show satisfactory real-time tracking and estimation performance. |
| Starting Page | 826 |
| Ending Page | 831 |
| File Size | 538524 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424422944 |
| DOI | 10.1109/MMSP.2008.4665188 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-10-08 |
| Publisher Place | Australia |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Cameras Field programmable gate arrays Pixel Clocks Classification algorithms Roads CMOS image sensors |
| Content Type | Text |
| Resource Type | Article |
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