NDLI: Implementing block cipher on embedded multiprocessors platform

Content Provider	IEEE Xplore Digital Library
Author	Khaddour, M. Wang, Z. Hammami, O.
Copyright Year	2009
Description	Author affiliation: Laboratory of Electronics and Informatics, ENSTA, Paris, France (Khaddour, M.; Wang, Z.; Hammami, O.)
Abstract	Multiprocessor platforms are gaining markets as a solution to boost general performance of processor beyond technological limitations that are present in single processors chips, Multi-processor in embedded systems also have a future in particular with applications like SDR(Software Defined Radio) where both high performance and high adaptability are required. Cryptographic algorithms implementation on embedded systems is also a hot topic for the rapidly developing wireless communication networks. In this paper we examine the implementation of the computation-intensive block ciphers AES and TDES algorithms on a 16 processors platform implemented on FPGA, we implemented a CBC operation mode which suites mass encryption on the platform and we obtained a linear speedup in computation time
Starting Page	193
Ending Page	198
File Size	1605841
Page Count	6
File Format	PDF
ISBN	9781424437566
DOI	10.1109/MMCS.2009.5256706
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-04-02
Publisher Place	Morocco
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Cryptography Scheduling algorithm Matrices Embedded system Concurrent computing Embedded computing Field programmable gate arrays Energy consumption Electronic packaging thermal management Hardware Virtex4 AES CBC mode Data Parallelization Embedded Multiprocessors FPGA TDES
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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