NDLI: An Efficient DMA Controller for Multimedia Application in MPU Based SOC

Content Provider	IEEE Xplore Digital Library
Author	Chia-Hao Yu Chung-Kai Liu Chih-Heng Kang Tsun-Hsien Wang Chih-Chien Shen Shau-Yin Tseng
Copyright Year	2007
Description	Author affiliation: Ind. Technol. Res. Inst., Hsinchu (Chia-Hao Yu; Chung-Kai Liu; Chih-Heng Kang; Tsun-Hsien Wang; Chih-Chien Shen; Shau-Yin Tseng)
Abstract	In this paper, we propose a multimedia direct memory access controller (M-DMAC) architecture for multimedia application. By observing the characteristics of the reference blocks for inter-prediction operation, several improvements are made in the M-DMAC. To reduce the address calculation time, the M-DMAC provides 2D coordination setting interface and helps transform the X-Y coordination information configured by user into physical data address. Furthermore, single M-DMAC channel configuration could transfer up to four reference blocks at a time. Besides, the M-DMAC allows non-specific address alignment data to be transferred in word size, which highly increases the bus bandwidth utilization. Experimental results show that our proposed M-DMAC performs around 2~4 times faster than traditional DMAC which supports 2D transfer.
Starting Page	80
Ending Page	83
File Size	2105003
Page Count	4
File Format	PDF
ISBN	1424410169
DOI	10.1109/ICME.2007.4284591
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-07-02
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Bandwidth Degradation Scattering Industrial control Video compression Image quality Image coding Multimedia computing Control systems Parallel processing
Content Type	Text
Resource Type	Article

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