NDLI: FFT Based Analog Speech Scrambler using TMS320C6711 DSP

Content Provider	IEEE Xplore Digital Library
Author	Jameel, A. Siyal, M.Y. Ahmed, N.
Copyright Year	2005
Description	Author affiliation: Hamdard Inst. of Inf. Technol., Hamdard Univ., Karachi (Jameel, A.)
Abstract	Secure speech communication has always been of much interest in commercial, civil and particularly military communication systems. In this paper we have proposed a two dimensional analog speech scrambling and descrambling scheme which is based on permutation and depermutation of FFT (fast Fourier transform) coefficients and subsequent implementation on Texas Instrument's 32-bit floating-point DSP (digital signal processor) TMS320C6711. This DSP provides an efficient solution to computational complexities of the scheme thereby making the system faster, accurate and reliable. In addition to speed, our algorithm focuses on three main parameters of speech privacy i.e., residual intelligibility, bandwidth expansion and encoding delay. Simulated results provide low residual intelligibility, good quality of recovered speech and low encoding delay. The work is an improvement in real-time secure speech communication systems in DSP environment
Starting Page	1
Ending Page	4
File Size	4053065
Page Count	4
File Format	PDF
ISBN	0780394291
DOI	10.1109/INMIC.2005.334457
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-12-24
Publisher Place	Pakistan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Digital signal processing Oral communication Encoding Delay Military communication Speech processing Fast Fourier transforms Instruments Digital signal processors Computational complexity Security Speech scrambling DSP FFT
Content Type	Text
Resource Type	Article

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