NDLI: Modeling Software Contention Using Colored Petri Nets

Content Provider	IEEE Xplore Digital Library
Author	Roy, N. Dabholkar, A. Hamm, N. Dowdy, L. Schmidt, D.
Copyright Year	2008
Description	Author affiliation: Dept. of Electr. Eng. & Comput. Sci., Vanderbilt Univ., Nashville, TN (Roy, N.; Dabholkar, A.; Hamm, N.; Dowdy, L.; Schmidt, D.)
Abstract	Commercial servers, such as database or application servers, often attempt to improve performance via multi-threading. Improper multi-threading architectures can incur contention, limiting performance improvements. Contention occurs primarily at two levels: (1) blocking on locks shared between threads at the software level and (2) contending for physical resources (such as the cpu or disk) at the hardware level. Given a set of hardware resources and an application design, there is an optimal number of threads that maximizes performance. This paper describes a novel technique we developed to select the optimal number of threads of a target-tracking application using a simulation-based colored Petri nets (CPNs) model. This paper makes two contributions to the performance analysis of multi-threaded applications. First, the paper presents an approach for calibrating a simulation model using training set data to reflect actual performance parameters accurately. Second, the model predictions are validated empirically against the actual application performance and the predicted data is used to compute the optimal configuration of threads in an application to achieve the desired performance. Our results show that predicting performance of application thread characteristics is possible and can be used to optimize performance.
Starting Page	1
Ending Page	8
File Size	7381637
Page Count	8
File Format	PDF
ISBN	9781424428175
ISSN	15267539
DOI	10.1109/MASCOT.2008.4770577
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-09-08
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Petri nets Quality of service Resource management Intersymbol interference Time measurement Computational modeling Parameter estimation Traffic control Admission control Delay
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
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