NDLI: Improved estimation for software multiplexing of performance counters

Content Provider	IEEE Xplore Digital Library
Author	Mathur, W. Cook, J.
Copyright Year	2005
Description	Author affiliation: Texas Instrum. Inc., San Diego, CA, USA (Mathur, W.)
Abstract	On-chip performance counters are gaining popularity as an analysis and validation tool. Most contemporary processors have between two and six physical counters that can monitor an equal number of unique events simultaneously at fixed sampling periods. Through multiplexing and estimation, an even greater number of unique events can be monitored in a single program execution. When a program is sampled in multiplexed mode using round-robin scheduling of a specified event set, the number of events that are physically counted during each sampling period is limited by the number of counters that can be simultaneously accessed. During this period, the remaining events of the multiplexed event-set are not monitored, but their counts are estimated. Our work quantifies the estimation error of the event-counts in the multiplexed mode, which indicates that as many as 42% of sampled intervals are estimated with error greater than 10%. We propose new estimation algorithms that result in an accuracy improvement of up to 40%.
Sponsorship	IEEE Comput. Soc
Starting Page	23
Ending Page	32
File Size	534123
Page Count	10
File Format	PDF
ISBN	0769524583
ISSN	15267539
DOI	10.1109/MASCOTS.2005.34
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-09-27
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Software performance Counting circuits Monitoring Hardware Sampling methods Context modeling Instruments Performance analysis Estimation error Registers
Content Type	Text
Resource Type	Article

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