NDLI: Improved concepts for the generation and the measurement of highly linear frequency ramps

Content Provider	IEEE Xplore Digital Library
Author	Musch, T.
Copyright Year	2005
Description	Author affiliation: KROHNE Messtechnik GmbH & Co., Duisburg, Germany (Musch, T.)
Abstract	A fractional ramp generator with an improved linearity and phase noise performance is presented. The fractional ramp synthesizer concept shown here is able to generate frequency ramps with a very low phase noise level and a very good frequency linearity and reproducibility. Related to the bandwidth of the generated frequency ramps of 4.5 GHz a relative linearity error below 3 /spl middot/ 10/sup -9/ is demonstrated in a prototype system. This linearity error is close to the limit set by the phase noise floor of the ramp generators and marks a significant improvement over existing approaches by Musch, T. and Schiek, B., (2000). As the phase noise is important for the linearity of the frequency ramp the set-up has to be optimized for a good phase noise behavior, too. In order to achieve this good phase noise a special phase-frequency detector is introduced that is especially designed for the use in a fractional phase locked loop.
Starting Page	4
Ending Page	1190
File Size	1071137
Page Count	1187
File Format	PDF
ISBN	2960055128
DOI	10.1109/EUMC.2005.1610145
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-10-04
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	EUROPEAN MICROWAVE ASSOCIATION
Subject Keyword	Frequency measurement Phase noise Linearity Frequency synthesizers Phase frequency detector Reproducibility of results Bandwidth Prototypes Phase detection Phase locked loops
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Fractional Divider Concepts with Phase-Lock-Control for the Generation of Precise Linear Frequency Ramps

A High Speed Heterodyne Measurement Concept Based on Two Extremely Linear Analog Frequency Ramps Generated with Fractional Divider Phase Locked Loops

A highly linear frequency ramp generator based on a fractional divider phase-locked-loop

Measuring the ramp linearity of extremely linear frequency ramps using a fractional dual loop structure

Measurement of the ramp linearity of extremely linear frequency ramps using a fractional dual loop structure

Phase-Noise Driven System Design of Fractional-N Frequency Synthesizers and Validation With Measured Results

Prediction of fractional-N spurs for UHF PLL frequency synthesizers

Bandwidth extension of low noise fractional-N synthesizers

Random Noise in Digital Gates and Dividers

Improved concepts for the generation and the measurement of highly linear frequency ramps

Similar Documents

Fractional Divider Concepts with Phase-Lock-Control for the Generation of Precise Linear Frequency Ramps

A High Speed Heterodyne Measurement Concept Based on Two Extremely Linear Analog Frequency Ramps Generated with Fractional Divider Phase Locked Loops

A highly linear frequency ramp generator based on a fractional divider phase-locked-loop

Measuring the ramp linearity of extremely linear frequency ramps using a fractional dual loop structure

Measurement of the ramp linearity of extremely linear frequency ramps using a fractional dual loop structure

Phase-Noise Driven System Design of Fractional-N Frequency Synthesizers and Validation With Measured Results

Prediction of fractional-N spurs for UHF PLL frequency synthesizers

Bandwidth extension of low noise fractional-N synthesizers

Random Noise in Digital Gates and Dividers

Improved concepts for the generation and the measurement of highly linear frequency ramps