NDLI: Flash quantum efficiency measurements for multi-junction solar cells

Content Provider	IEEE Xplore Digital Library
Author	Horner, G.S. Vasilyev, L.A. Schmidt, J. Hudson, J.E. Arbore, M. Dybiec, M. Good, E.A.
Copyright Year	2011
Description	Author affiliation: Tau Science Corporation, Mountain View, CA, USA (Schmidt, J.) \|\| Tau Science Corporation, Beaverton, OR, USA (Horner, G.S.; Vasilyev, L.A.; Hudson, J.E.) \|\| Gener 8, Mountain View, CA, USA (Arbore, M.) \|\| Solarworld Industries America, Hillsboro, OR, USA (Dybiec, M.; Good, E.A.)
Abstract	Flash Quantum Efficiency — a technique used to simultaneously measure full spectrum external quantum efficiency (EQE), Reflectance (R), and Transmittance (T), has been introduced in two prior publications [1,2]. The method uses a novel architecture to simultaneously modulate a bank of solid state lightsources and measure, in real time, the cell response to each wavelength. In this work we extend it to include two additional capabilities-automated spatial mapping and multi-junction measurements. Mapping throughput of 2400 sites per hour is demonstrated on single crystal silicon cells with a signal to noise ratio that is significantly higher than conventional QE. New inverted metamorphic cells are also used to develop and demonstrate a multi-junction FlashQE technique with total acquisition time of less than four seconds per triple-junction cell.
Starting Page	001716
Ending Page	001720
File Size	1113481
Page Count	5
File Format	PDF
ISBN	9781424499663
ISSN	01608371
e-ISBN	9781424499656
DOI	10.1109/PVSC.2011.6186285
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-06-19
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wavelength measurement Junctions Reflectivity Computer architecture Silicon Microprocessors Temperature measurement
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Control and Systems Engineering Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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