NDLI: Performance Analysis of a Logarithmic based Phase Detector for Tan-Locked Loops

Content Provider	IEEE Xplore Digital Library
Author	Kandeepan, S. Reisenfeld, S.
Copyright Year	2007
Description	Author affiliation: Australian Nat. Univ., Canberra (Kandeepan, S.)
Abstract	Nonlinear system design is a common practice in communication engineering for improved performances in advanced receivers. Here we look into a logarithmic based nonlinear loop for a second order arctan based digital phase locked loop (D-PLL) for frequency synchronisation. The steady state and the acquisition performances of the loop are analyzed. The logarithmic nonlinearity is intentionally introduced to have improved phase noise performances during the steady state tracking mode. We present a close form expression for the open loop statistical distribution of the phase noise process and compare it with the linear PLL model on its performances. We also study the acquisition process of the loop by looking at the phase plane trajectories.
Starting Page	1
Ending Page	5
File Size	192817
Page Count	5
File Format	PDF
ISBN	9781424411436
DOI	10.1109/PIMRC.2007.4394740
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-09-03
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Performance analysis Phase detection Detectors Phase locked loops Steady-state Phase noise Nonlinear systems Design engineering Frequency locked loops Frequency synchronization
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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