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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ferdous, Nilufar Lee, Byeong Kil John, Eugene |
| Copyright Year | 2014 |
| Description | Author affiliation: Dept. Electrical & Computer Eng. University of Texas San Antonio, San Antonio, USA (Ferdous, Nilufar) || Samsung Research, Samsung, Seoul, Korea (Lee, Byeong Kil) || Dept. of Electrical & Computer Eng., University of Texas San Antonio, San Antonio, USA (John, Eugene) |
| Abstract | Advances in process technology has enabled the integration of many cores on a single die. The advent of many core systems has led to a commensurate increase in cache coherence complexity. As a solution to this problem, researches have proposed directory based protocols, which are scalable alternatives to snoop-based protocols. Although write-invalidation based directory protocols enhance the performance of large-scale multiprocessors, coherence misses are intrinsic impediments in such systems. Write-update protocols were proposed as a means to reduce these coherence misses. However, previous researches have shown that pure write-update protocol is highly undesirable because of the heavy traffic caused by the aggressive updates. In order to remedy these limitations, we propose a performance-aware mechanism which dynamically classifies the sharers of each cache block, either as a weak-sharing-group or an efficient-sharing-group and exploit this dynamic classification as a metric for seamless dynamic adaptation between write-invalidate and write-update strategy on a per block basis. Exploitation of the dynamic adaptation of the protocol, based on the sharing-group speculation, reduces unnecessary accesses to the shared last level cache and hence reduces the traffic caused by coherence misses and directory accesses. Simulation results on a 64-core CMP show that our proposed method can achieve 15 % (average) speedup over the baseline directory-based MOESI cache coherence protocol with PARSEC workloads. Our proposed work also reduces the L1 cache miss rate by 17 %(average). The network traffic caused by directory accesses and L1 read misses are also reduced by 16% and 17% respectively. |
| Starting Page | 1 |
| Ending Page | 8 |
| File Size | 315457 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781479975754 |
| DOI | 10.1109/PCCC.2014.7017063 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-12-05 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Protocols Coherence Time-frequency analysis Telecommunication traffic Multicore processing Bandwidth Equations competent-sharing based speculated update policy Multicore systems cache coherence weak-sharing-group efficient-sharing-group MOESI core locality |
| Content Type | Text |
| Resource Type | Article |
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