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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Xiaowen Chu Kaiyong Zhao Mea Wang |
| Copyright Year | 2008 |
| Description | Author affiliation: Dept. of Comput. Sci., Univ. of Calgary, Calgary, AB (Mea Wang) || Dept. of Comput. Sci., Hong Kong Baptist Univ., Hong Kong (Xiaowen Chu; Kaiyong Zhao) |
| Abstract | Network coding has recently been widely applied in various networks for system throughput improvement and/or resilience to network dynamics. However, the computational overhead introduced by the network coding operations is not negligible and has become the cornerstone for real deployment of network coding. In this paper, we exploit the computing power of contemporary Graphic Processing Units (GPUs) to accelerate the network coding operations. We proposed three parallel algorithms that maximize the parallelism of the encoding and decoding processes, i.e., the power of GPUs is fully utilized. This paper also shares our optimization design choices and our workarounds to the challenges encountered in working with GPUs. With our implementation of the algorithms, we are able to achieve up to 12 times of speedup over the highly optimized CPU counterpart, using the NVIDIA GPU and the Computer Unified Device Architecture (CUDA) programming model. |
| Starting Page | 144 |
| Ending Page | 151 |
| File Size | 708916 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781424433681 |
| ISSN | 10972641 |
| DOI | 10.1109/PCCC.2008.4745113 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-12-07 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Network coding Computer networks Throughput Resilience Graphics Acceleration Parallel algorithms Parallel processing Encoding Decoding CUDA GPU computing |
| Content Type | Text |
| Resource Type | Article |
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