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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ju-Young Jung Sangyeun Cho |
| Copyright Year | 2011 |
| Description | Author affiliation: Computer Science Department, University of Pittsburgh (Ju-Young Jung; Sangyeun Cho) |
| Abstract | It has been foreseen that some of the roles assumed by conventional rotating hard disk drives (HDDs) will migrate to solid-state drives (SSDs) and emerging persistent RAM storages. New persistent RAM storages have critical advantages over HDDs and even SSDs in terms of performance and power. Persistent RAM technologies are flexible enough to be used for both storage and main memory — in future platforms, this flexibility will allow tighter integration of a system's memory and storage hierarchy. On the other hand, designers are faced with new technical issues to address to fully exploit the benefits of persistent RAM technologies and hide their downsides. In this paper, we introduce PRISM (PeRsIstent RAM Storage Monitor) — our novel infrastructure that enables exploring various design trade-offs of persistent RAM storage. PRISM allows designers to examine a persistent RAM storage's low-level behavior and evaluate its various architectural organizations while running realistic workloads, as well as storage activities of a contemporary off-the-shelf OS. PRISM builds on kernel source code level instrumentation and the standard Linux device driver mechanism to generate persistent RAM storage traces. Moreover, PRISM includes a storage architecture simulator to faithfully model major persistent RAM storage hardware components. To illustrate how and with what PRISM can help the user, we present a case study that involves running an OLTP (on-line transaction processing) workload. PRISM successfully provides the detailed performance analysis results, while incurring acceptable overheads. Based on our experience, we believe that PRISM is a versatile tool for exploring persistent RAM storage design choices ranging from OS-level resource management policy down to chip-level storage organization. |
| Starting Page | 22 |
| Ending Page | 31 |
| File Size | 722173 |
| Page Count | 10 |
| File Format | |
| ISBN | 9781612843674 |
| e-ISBN | 9781612843681 |
| DOI | 10.1109/ISPASS.2011.5762712 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-04-10 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Random access memory Kernel Ash Hardware Driver circuits Linux |
| Content Type | Text |
| Resource Type | Article |
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