NDLI: The Datacon Master-renovation of a Datacon field bus communications system for accelerator control

Content Provider	IEEE Xplore Digital Library
Author	Kerner, T.M. Warkentien, R.
Copyright Year	1995
Description	Author affiliation: AGS Dept., Brookhaven Nat. Lab., Upton, NY, USA (Kerner, T.M.; Warkentien, R.)
Abstract	The Datacon Master (V110) is a custom-designed VME-bus SEC event driven serial communications engine featuring a superscaler RISC 32-bit Intel i960 CPU. The V110 and a commercial VMEbus host CPU running vxWorks with an Ethernet LAN connecting UNIX workstation consoles, make up the real time control system. Five V110 and three host CPUs will replace and upgrade PDP10 and PDP8 Datacon AGS front end computers. Five V110s will support twenty Datacon field busses with some 2600 devices. The V110 firmware is written in C. An accelerator event time link interface and /spl mu/S timestamp are built-in. Each Datacon field bus supports up to 256 devices on a multidrop RG62A/U coaxial cable with up to 2000 feet between repeaters. Each V110 drives up to four full Datacon field busses at 1 MHz bandwidth.
Starting Page	2232
Ending Page	2234
File Size	485693
Page Count	3
File Format	PDF
ISBN	0780329341
DOI	10.1109/PAC.1995.505508
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-05-01
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Central Processing Unit Engines Reduced instruction set computing Ethernet networks Local area networks Joining processes Workstations Real time systems Communication system control Control systems
Content Type	Text
Resource Type	Article

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