NDLI: Parallel and distributed meldable priority queues based on binomial heaps

Content Provider	IEEE Xplore Digital Library
Author	Crupi, V.A. Das, S.K. Pinotti, M.C.
Copyright Year	1996
Description	Author affiliation: Istituto di Elaborazione dell'Inf., CNR, Pisa, Italy (Crupi, V.A.; Das, S.K.; Pinotti, M.C.)
Abstract	On the parallel random access machine (PRAM) models, we present an optimal implementation of a meldable priority queue based on the binomial heap data structure. Doubly logarithmic time, cost-optimal algorithms are proposed on the EREW PRAM model for such queue-operations as Insert, Min, Extract-Min, and Union (often called melding). Our Union algorithm exploits its natural similarity with the problem of adding two binary integers. Two other operations, Change-Key and Delete, are also solved optimally on the CREW PRAM model and their amortized complexity is analyzed. The algorithm for Delete operation uses tricks for postponing the global effect of a node deletion. Additionally, we present an implementation of a distributed meldable priority queue on, the single-port hypercube model. Adopting a b-bandwidth binomial heap as the underlying data structure and a mapping which minimizes the amount of data movement among the processors when two binomial trees are melded, the hypercube algorithm, attains a nearly optimal amortized speed-up for the Insert, Extract-Min and Union operations.
Starting Page	255
Ending Page	262
File Size	958251
Page Count	8
File Format	PDF
ISBN	081867623X
ISSN	01903918
DOI	10.1109/ICPP.1996.537167
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-08-12
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase change random access memory Costs Parallel algorithms Data structures Data mining Hypercubes Tree data structures Vegetation mapping Algorithm design and analysis Upper bound
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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