NDLI: ClusterGOP: A high-level parallel programming environment

Content Provider	IEEE Xplore Digital Library
Author	Jiannong Cao
Copyright Year	2004
Description	Author affiliation: Hong Kong Polytechnic University (Jiannong Cao)
Abstract	It has been agreed that the acceptance of parallel computing mainly depends on the quality of a high-level programming model, which should provide powerful abstractions in order to free the programmer from the burden of dealing with low-level issues. In this paper, we describe a high-level, graph-oriented programming model, called GOP, and a programming environment, called ClusterGOP, for building and developing message-passing parallel programs. GOP support high-level design and programming of parallel and distributed systems by providing built-in support for a language-level construct and various operations on a high-level abstraction called the logical graph. With GOP, the configuration of the interacting processes of a parallel/distributed program can be represented as a user-specified logical graph that is mapped onto the physical network topology. The programming of inter-process communication and synchronization between local processors is supported by built-in primitives for graph-based operations. ClusterGOP is a programming environment built on top of the GOP model, providing a high-level programming abstraction through the ClusterGOP library for building parallel applications in clusters, It contains tools for development of GOP-based parallel programs with intelligent, visual support and a run-time system for deployment, execution, and management of the programs. ClusterGOP supports both SPMD and MPMD parallel computing paradigms. Also, with ClusterGOP, developing large parallel programs can be simplified with the predefined graph types and scalability support. The ClusterGOP system is portable as its implementation is based almost exclusively on calls to MPI, a portable messagepassing standard.
Starting Page	158
Ending Page	158
File Size	191674
Page Count	1
File Format	PDF
ISBN	0769521983
ISSN	15302016
DOI	10.1109/ICPPW.2004.1328010
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-08-18
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Parallel programming Parallel processing Programming environments Concurrent computing Programming profession Power system modeling Buildings Logic programming Network topology Libraries
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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