NDLI: Mapping Linear Workflows with Computation/Communication Overlap

Content Provider	IEEE Xplore Digital Library
Author	Agrawal, K. Benoit, A. Robert, Y.
Copyright Year	2008
Description	Author affiliation: Ecole Normale Super. de Lyon, Lyon, France (Benoit, A.; Robert, Y.)
Abstract	This paper presents theoretical results for mapping and scheduling linear workflows onto heterogeneous platforms. We use a realistic architectural model, representative of current multi-threaded systems. Our model has bounded communication capabilities and full computation/communication overlap. In these workflow applications, the goal is often to maximize throughput or to minimize latency. We present several complexity results, and approximation algorithms, for these two criteria. We also consider the implications of adding feedback loops to linear chain applications.
Starting Page	195
Ending Page	202
File Size	268050
Page Count	8
File Format	PDF
ISBN	9780769534343
ISSN	15219097
DOI	10.1109/ICPADS.2008.107
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-12-08
Publisher Place	Australia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Throughput Delay Feedback loop Polynomials Approximation algorithms Streaming media Concurrent computing Distributed computing USA Councils Processor scheduling approximation algorithms mapping linear workflow feedback loop communication/computation overlap bounded multi-port complexity results
Content Type	Text
Resource Type	Article
Subject	Hardware and Architecture

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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