NDLI: Deadlock-free routing in an optical interconnect for high-speed wormhole routing networks

Content Provider	IEEE Xplore Digital Library
Author	Palnati, P. Gerla, M. Leonardi, E.
Copyright Year	1996
Description	Author affiliation: Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA (Palnati, P.; Gerla, M.)
Abstract	The Supercomputer SuperNet (SSN) is a two-level hierarchical high-speed network. The lower level is a high speed electronic mesh fabric; the higher level is a WDM optical backbone network interconnecting the high-speed fabrics distributed across a campus or metropolitan area. The salient characteristics of this architecture are the use of wormhole routing and backpressure hop-by-hop flow control mechanism. Because of these features, deadlocks are possible in SSN. In this paper, we address the issue of deadlock-free routing which is an essential prerequisite for the proper operation of SSN. To this end, we first present a deadlock free routing scheme for the WDM backbone which is implemented with a shufflenet multihop virtual topology. We use the notion of virtual channels to obtain mappings of virtual channels to physical channels such that deadlock-free routing is achieved for any (p,k) shufflenet (uni and bidirectional). Then, we compare the virtual channels scheme with the more conventional up/down deadlock free routing scheme for the bidirectional shufflenet and show that the former yields much better performance. Finally, we address the problem of deadlock prevention across the entire network (i.e., lower level fabric as well as the optical backbone) and develop an integrated solution combining different schemes best suited for the different levels.
Starting Page	256
Ending Page	264
File Size	1066423
Page Count	9
File Format	PDF
ISBN	0818672676
DOI	10.1109/ICPADS.1996.517571
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-06-03
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System recovery Routing Optical interconnections Fabrics Spine Wavelength division multiplexing High speed optical techniques Optical fiber networks Supercomputers High-speed networks
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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