NDLI: Direct mapped cache performance modeling for sparse matrix operations

Content Provider	IEEE Xplore Digital Library
Author	Doallo, R. Fraguela, B.B. Zapata, E.L.
Copyright Year	1999
Description	Author affiliation: Dept. de Electron. e Sistemas, Coruna Univ., Spain (Doallo, R.)
Abstract	Sparse matrices are in the kernel of numerical applications. Their compressed storage, which permits both operations and memory savings, generates irregular access patterns, reducing the performance of the memory hierarchy In this work we present a probabilistic model for the prediction of the number of misses of a direct mapped cache memory, considering sparse matrices with a uniform entries distribution. The number of misses is directly related to the program execution time and the memory hierarchy performance. The model considers the three types of standard interferences: intrinsic, self-cross interferences. We explain in detail the modeling of a representative matrix operation such as the sparse matrix-dense matrix product, considering several loop orderings, and include validation results that show the model accuracy.
Starting Page	331
Ending Page	338
File Size	117437
Page Count	8
File Format	PDF
ISBN	0769500595
ISSN	10666192
DOI	10.1109/EMPDP.1999.746696
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1999-02-03
Publisher Place	Portugal
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Sparse matrices Analytical models Interference Ice Batteries Computational modeling Hardware Counting circuits Microprocessors Predictive models
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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