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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Slawinska, M. Slawinski, J. Kurzyniec, D. Sunderam, V. |
| Copyright Year | 2007 |
| Description | Author affiliation: Dept. of Math. & Comput. Sci., Emory Univ., Atlanta, GA (Slawinska, M.; Slawinski, J.; Kurzyniec, D.; Sunderam, V.) |
| Abstract | Fast hardware turnover in supercomputing centers, stimulated by rapid technological progress, results in high heterogeneity among HPC platforms, and necessitates that applications are ported and adapted frequently. The cutting-edge nature of the hardware mandates customized performance tuning, which, coupled with continuously growing application complexity, makes the process inherently and increasingly challenging. In this paper, we analyze build procedures of a representative set of HPC applications, and attempt to identify commonalities that can be exploited to enhance cross-platform portability. We then propose a novel method for reducing non-portabilities while preserving high performance. The approach, based on profiles that capture and isolate non-portable features at various levels, requires only a moderate amount of changes to existing makefiles. It leverages the expertise of system designers and administrators, and reduces burdens placed on application scientists. As a proof of concept, we discuss the application of our methodology to enhancing portability of the Mile application across heterogeneous HPC platforms. |
| Starting Page | 1 |
| Ending Page | 8 |
| File Size | 8077052 |
| Page Count | 8 |
| File Format | |
| ISBN | 1424409098 |
| DOI | 10.1109/IPDPS.2007.370333 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-03-26 |
| Publisher Place | Italy |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Computer applications Hardware Optimizing compilers Application software Computer science Drives USA Councils Variable structure systems Parallel processing Laboratories |
| Content Type | Text |
| Resource Type | Article |
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