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  1. IEEE Conference on Open Architectures and Network Programming.
  2. 2001 IEEE Open Architectures and Network Programming Proceedings. OPENARCH 2001 (Cat. No.01EX484)
  3. VERA: an extensible router architecture
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2003 IEEE Conference onOpen Architectures and Network Programming.
2002 IEEE Open Architectures and Network Programming Proceedings. OPENARCH 2002 (Cat. No.02EX571)
2001 IEEE Open Architectures and Network Programming Proceedings. OPENARCH 2001 (Cat. No.01EX484)
2001 IEEE Open Architectures and Network Programming Proceedings. OPENARCH 2001 (Cat. No.01EX484)
VERA: an extensible router architecture
An access control architecture for programmable routers
Dynamic hardware plugins (DHP): exploiting reconfigurable hardware for high-performance programmable routers
Building multicast services from unicast forwarding and ephemeral state
Active reliable multicast on CANEs: a case study
Strong security for active networks
Securing distributed adaptation
New models and algorithms for programmable networks
Active networking on a programmable networking platform
Regatta: a framework for automated supervision of network clouds
Constructing end-to-end paths for playing media objects
Providing applications with mobile agent technology
Implementing configurable signalling in the MULTE-ORB
Author index
2000 IEEE Third Conference on Open Architectures and Network Programming. Proceedings (Cat. No.00EX401)
1999 IEEE Second Conference on Open Architectures and Network Programming. Proceedings. OPENARCH '99 (Cat. No.99EX252)
1998 IEEE Open Architectures and Network Programming

VERA: an extensible router architecture

Content Provider IEEE Xplore Digital Library
Author Karlin, S. Peterson, L.
Copyright Year 2001
Description Author affiliation: Dept. of Comput. Sci., Princeton Univ., NJ, USA (Karlin, S.)
Abstract We recognize two trends in router design: increasing pressure to extend the set of services provided by the router and increasing diversity in the hardware components used to construct the router. The consequence of these two trends is that it is becoming increasingly difficult to map the services onto the underlying hardware. Our response to this situation is to define a virtual router architecture, called VERA, that hides the hardware details from the forwarding functions. This paper presents the details of VERA and reports preliminary experiences implementing various aspects of the architecture.
Sponsorship IEEE
Starting Page 3
Ending Page 14
File Size 298989
Page Count 12
File Format PDF
ISBN 0780370643
DOI 10.1109/OPNARC.2001.916834
Language English
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date 2001-04-27
Publisher Place USA
Access Restriction Subscribed
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword Hardware Routing Quality of service Protocols Operating systems Computer architecture Computer science IP networks Web and internet services Information filtering
Content Type Text
Resource Type Article
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