NDLI: An accurate soft error propagation analysis technique considering temporal masking disablement

Content Provider	IEEE Xplore Digital Library
Author	Kimi, Y. Matsukawa, G. Yoshida, S. Izumi, S. Kawaguchi, H. Yoshimoto, M.
Copyright Year	2015
Description	Author affiliation: Grad. Sch. of Syst. Inf., Kobe Univ., Kobe, Japan (Kimi, Y.; Matsukawa, G.; Yoshida, S.; Izumi, S.; Kawaguchi, H.; Yoshimoto, M.)
Abstract	This paper presents an accurate soft error propagation analysis technique for processor SER evaluation. Especially, we focus on Single Event Upset (SEU) in flip-flop which is a main contributor of processor SER. SEUs in flip-flops propagate combinational circuits with temporal masking and logical masking effects. The temporal masking is disabled when the erroneous flip-flop is disabled. The proposed technique is able to evaluate temporal masking disablement by combined analysis of temporal and logical effects. Experimental result shows that the proposed technique reduces 49.87% inaccuracy in average compared with the technique ignoring temporal masking disablement when the enabled probability of the erroneous flip-flop is 0.1.
Starting Page	23
Ending Page	25
File Size	135317
Page Count	3
File Format	PDF
e-ISBN	9781467379052
DOI	10.1109/IOLTS.2015.7229822
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-07-06
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flip-flops Clocks Probability Accuracy Error analysis Monte Carlo methods temporal masking processor soft error rate soft error propagation logical masking
Content Type	Text
Resource Type	Article

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