NDLI: NBTI aging tolerance in pipeline based designs NBTI

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NBTI aging tolerance in pipeline based designs NBTI

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NBTI aging tolerance in pipeline based designs NBTI

Content Provider	IEEE Xplore Digital Library
Author	Katsarou, K. Tsiatouhas, Y. Arapoyanni, A.
Copyright Year	2013
Description	Author affiliation: Dept. of Inf. & Telecommun., Univ. of Athens, Athens, Greece (Arapoyanni, A.) \|\| Dept. of Comput. Sci., Univ. of Ioannina, Ioannina, Greece (Katsarou, K.; Tsiatouhas, Y.)
Abstract	Aging mechanisms, like Negative Bias Temperature Instability (NBTI), are a great concern in CMOS nanometer technologies. In this work, we present pipeline oriented timing error tolerance techniques with a special interest in NBTI related performance degradation. Three scenarios are discussed that provide the required error tolerance in pipeline based designs. Moreover, a new flip-flop is presented, to support two of the above scenarios, which is capable to detect and locally correct timing errors. A main characteristic of the proposed flip-flop is the NBTI resistant error handling operation. Simulation results validate the efficiency of the new design.
Starting Page	31
Ending Page	36
File Size	237140
Page Count	6
File Format	PDF
ISBN	9781479906642
DOI	10.1109/IOLTS.2013.6604047
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-07-08
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Testing Decision support systems Timing error tolerance NBTI degradation Timing errors Error detection and correction
Content Type	Text
Resource Type	Article

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