NDLI: Enhancing time triggered scheduling with value based overload handling and task migration

Content Provider	IEEE Xplore Digital Library
Author	Carlson, J. Lennvall, T. Fohler, G.
Copyright Year	2003
Description	Author affiliation: Dept. of Comput. Sci. & Eng., Malardalen Univ., Sweden (Carlson, J.; Lennvall, T.; Fohler, G.)
Abstract	Time triggered methods provide deterministic behaviour suitable for critical real-time systems. The), perform less favourably, however if the arrival times of some activities are not known in advance, in particular if overload situations have to be anticipated. In many systems, the criticality of only a subset of activities justify the cost associated with the time triggered methods. In this paper we consider distributed systems where a subset of critical activities are handled in a time triggered fashion, via an offline schedule. At runtime, the arrival of aperiodic tasks may cause overload that demands to be handled in such a way that i) time triggered activities still meet all their original constraints, ii) execution of high-valued tasks are prioritised over tasks with lower value, iii) tasks can be quickly migrated to balance the overall system load. We give a precise formulation of overload detection and value based task rejection in the presence of offline scheduled tasks, and present a heuristic algorithm to handle overload. To benefit from the distributed setting, the overload handling includes an algorithm that integrates migration of rejected tasks with resource reclaiming and an acceptance test of newly arrived tasks. Simulation results underline the effectiveness of the presented approach.
Sponsorship	IEEE Comput. Soc. Tech. Committee on Distributed Process. Commun. Res. Lab., Japan Asian Office of Aerosp. Res. & Dev
Starting Page	121
Ending Page	128
File Size	374818
Page Count	8
File Format	PDF
ISBN	0769519288
DOI	10.1109/ISORC.2003.1199244
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-05-16
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Runtime Real time systems Processor scheduling Costs Heuristic algorithms Scheduling algorithm Testing Switches Computer science Jitter
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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