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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Graw, G. Herrmann, P. Krumm, H. |
| Copyright Year | 2000 |
| Description | Author affiliation: Fachbereich Inf., Dortmund Univ., Germany (Graw, G.) |
| Abstract | The Unified Modeling Language UML is well-suited for the design of real-time systems. In particular the design of dynamic system behaviors is supported by interaction diagrams and statecharts. Real-time aspects of behaviors can be described by time constraints. The semantics of the UML, however, is non-formal. In order to enable formal design verification, we therefore propose to complement the UML based design by additional formal models which refine UML diagrams to precise formal models. We apply the formal specification technique cTLA which is based on L. Lamport's Temporal Logic of Actions, TLA. In particular cTLA supports modular definitions of process types and the composition of systems from coupled process instances. Since process composition has superposition character each process system has all of the relevant properties of its constituting processes. Therefore mostly small subsystems are sufficient for the verification of system properties and it is not necessary to use complete and complex formal system models. We present this approach by means of an example and also exemplify the formal verification of its hard real-time properties. |
| Starting Page | 86 |
| Ending Page | 95 |
| File Size | 110421 |
| Page Count | 10 |
| File Format | |
| ISBN | 0769506070 |
| DOI | 10.1109/ISORC.2000.839515 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2000-03-17 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Real time systems Unified modeling language Electrical capacitance tomography Logic Collaborative work Packaging |
| Content Type | Text |
| Resource Type | Article |
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