NDLI: Beam test of a large area n-on-n silicon strip detector with fast binary readout electronics

Content Provider	IEEE Xplore Digital Library
Author	Unno, Y. Kehriki, T. Terada, S. Iwasaki, H. Kondo, T. Nakao, M. Tamura, N. Fujita, K. Handa, T. Iwata, Y. Ohsugi, T. Dane, J. Pier, S. Ciocio, A. Emes, J. Gilchriese, M. Haber, C. Holland, S. Kipnis, I. Lozano-Bahile, J. Shapiro, M. Siegrist, J. Spieler, H. Moorhead, G. Dubbs, T. Grillo, A. Kashigin, S. Kroeger, W. Spieler, H. Moorhead, G. Dubbs, T. Grillo, A. Kashigin, S. Kroeger, W. Rowe, B. Spencer, E. Sadrozinski, H.F.W. Wilder, M. Takashima, R.
Copyright Year	1997
Description	Author affiliation: Okayama Univ., Japan (Unno, Y.)
Abstract	A large area (60 mm/spl times/60 mm) n-bulk and n-strip readout silicon strip detector was prototyped for the ATLAS SCT detector. Detector modules of 12 cm strip length were made by butting two detectors. One of the 12 cm modules was irradiated with protons to a fluence of 1.2/spl times/10/sup 14/ p/cm/sup 2/. A beam test was carried out for the non-irradiated and the irradiated detector modules. Efficiency, noise occupancy and performance in the edge regions were analyzed using the beam test data. High efficiency was obtained for the non-irradiated detector and for the irradiated detector for bias voltages down to about half the full depletion voltage. The noise occupancy was <2/spl times/10/sup -4/ for the 12 cm strips. The measurement of the edge region exhibited a difference in the sensitivity under the bias resistance where no extension of the n/sup +/-implant was fabricated.
Starting Page	573
Ending Page	577
File Size	576785
Page Count	5
File Format	PDF
ISBN	0780335341
ISSN	10823654
DOI	10.1109/NSSMIC.1996.591064
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-11-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electronic equipment testing Silicon Strips Readout electronics Detectors Voltage Semiconductor device noise Prototypes P-n junctions Manufacturing processes
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Beam Test of a Large Area n-on-n Silicon Strip Detector with Fast Binary Readout Electronics (0)

Beam test of a large area n-on-n silicon strip detector with fast binary readout electronics

Beam test of a large area n-on-n silicon strip detector with fast binary readout electronics (0).

Characterization of double-sided silicon strip detector with fast binary readout electronics using pion beams

Beam test of a large area n-on-n silicon strip detector with fast binary readout electronics

Performance of the binary readout of silicon strip detectors using the radiation hard SCT128B chip

Characterization of an irradiated double-sided silicon strip detector with fast binary readout electronics in a pion beam (1996).

Characterization of an irradiated double-sided silicon strip detector with fast binary readout electronics in a pion beam

Design and performance of the ABCD chip for the binary readout of silicon strip detectors in the ATLAS semiconductor tracker

Beam test of a large area n-on-n silicon strip detector with fast binary readout electronics

Similar Documents

Beam Test of a Large Area n-on-n Silicon Strip Detector with Fast Binary Readout Electronics (0)

Beam test of a large area n-on-n silicon strip detector with fast binary readout electronics

Beam test of a large area n-on-n silicon strip detector with fast binary readout electronics (0).

Characterization of double-sided silicon strip detector with fast binary readout electronics using pion beams

Beam test of a large area n-on-n silicon strip detector with fast binary readout electronics

Performance of the binary readout of silicon strip detectors using the radiation hard SCT128B chip

Characterization of an irradiated double-sided silicon strip detector with fast binary readout electronics in a pion beam (1996).

Characterization of an irradiated double-sided silicon strip detector with fast binary readout electronics in a pion beam

Design and performance of the ABCD chip for the binary readout of silicon strip detectors in the ATLAS semiconductor tracker

Beam test of a large area n-on-n silicon strip detector with fast binary readout electronics