NDLI: Linear quantization of Hebbian-type associative memories in interconnection implementations

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Linear quantization of Hebbian-type associative memories in interconnection implementations

Content Provider	IEEE Xplore Digital Library
Author	Pao-Choo Chung Ching-Tsorng Tsai Yung-Nien Sun
Copyright Year	1994
Description	Author affiliation: Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan (Pao-Choo Chung; Ching-Tsorng Tsai)
Abstract	The effects of linear quantized Hebbian-type associative memories (HAMs) on storage capacity and hardware implementations are explored in this paper. For the linear quantization, the interconnection weights are linearly quantized into a small number of levels. This consideration focuses mainly on the situation when only a limited accuracy range can be achieved on hardware implementations. Results of simulation and theory show that the number of quantization levels required is relatively small compared with the possible values of interconnections. Therefore, linear quantization in HAMs is worthwhile in hardware implementations.
Starting Page	1092
Ending Page	1097
File Size	373656
Page Count	6
File Format	PDF
ISBN	078031901X
DOI	10.1109/ICNN.1994.374335
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-06-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Quantization Integrated circuit interconnections Hardware Very large scale integration Neurons Associative memory Analog circuits Digital circuits Sun Hebbian theory
Content Type	Text
Resource Type	Article

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