NDLI: A unique FPGA for the implementation of neural strategies for identifying harmonic distortions

Content Provider	IEEE Xplore Digital Library
Author	Dzonde, S.R.N. Berviller, H. Kom, C.H. Wira, P.
Copyright Year	2013
Description	Author affiliation: Lab. des Sci. de l'ingenieur, de l'Inf. et de l'imagerie (ICUBE), Univ. of Strasbourg, Strasbourg, France (Berviller, H.) \|\| Lab. Modelisation, Intell., Processus, Syst. (MIPS), Univ. de Haute Alsace, Mulhouse, France (Wira, P.) \|\| Lab. d'Electron., Electrotech., Autom. et Telecommun. (L2EAT), Univ. of Douala, Douala, Cameroon (Dzonde, S.R.N.; Kom, C.H.)
Abstract	In this paper, three optimized neural harmonics extraction methods are presented and compared in terms of simulation results, FPGA implementation and practical considerations. Those distortion identification schemes are used in nonlinear loads compensation with Active Power Filters (APF). This optimization is performed in order reduce the number of hardware resources required for digital implementations. The given approaches tend to use only one Adaline and remain powerful even under unbalanced conditions of voltage. In this way, the implementation of all the functionalities of the active filter control has been realized by means of a unique FPGA chip. Moreover, even the most consuming method (i.e., the ITM) uses less than 52% of hardware resources. Even though the mp-q technique (based on the instantaneous reactive power theory) is not the fastest in terms of hardware response time, it stills appear the most powerful for its filtering aptitudes with an experimental source-side current THD of 3.3% after compensation.
Sponsorship	IEEE Ind. Electron. Soc.
Starting Page	352
Ending Page	357
File Size	755108
Page Count	6
File Format	PDF
ISBN	9781479902248
ISSN	1553572X
DOI	10.1109/IECON.2013.6699161
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-11-10
Publisher Place	Austria
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Harmonic analysis Field programmable gate arrays Power harmonic filters Active filters Hardware Reactive power
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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