NDLI: Real-Time Implementation of IPM Motor Protection Using Artificial Neural Network

Content Provider	IEEE Xplore Digital Library
Author	Khan, M.A.S. Rahman, M.A.
Copyright Year	2007
Description	Author affiliation: Memorial Univ. of Newfoundland, St. John's (Khan, M.A.S.; Rahman, M.A.)
Abstract	This paper presents an on-line protection scheme for three-phase interior permanent magnet (IPM) motors using artificial neural network. The proposed protection scheme is developed and implemented in real-time using the DS1102 digital signal processor (DSP) board. In this work, a two-layer feed-forward neural network (FFNN) with sixteen inputs and single output is designed and trained off-line with experimental data using the back-propagation algorithm. An experimental setup is developed to accommodate the on-line testing and to carry out the protection of IPM motors. Three types of faults such as single line to ground (L-G) fault, line-to-line (L-L) fault, and single phasing fault are investigated. The technique is evaluated and tested on-line on the laboratory 1-hp and 5-hp IPM motors using the DSP board. The laboratory results show that the proposed technique is able to detect the faulted conditions with high accuracy.
Starting Page	1021
Ending Page	1026
File Size	4887287
Page Count	6
File Format	PDF
ISBN	1424407834
ISSN	1553572X
DOI	10.1109/IECON.2007.4459936
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-11-05
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Protection Artificial neural networks Permanent magnet motors Digital signal processing Testing Laboratories Digital signal processors Feedforward systems Neural networks Feedforward neural networks Real-Time implementation Digital signal processor Fault detection Feed-forward neural network Interior permanent magnet motor
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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