NDLI: Distributed modulo scheduling

Content Provider	IEEE Xplore Digital Library
Author	Fernandes, M.M. Llosa, J. Topham, N.
Copyright Year	1999
Description	Author affiliation: Dept. of Comput. Sci., Edinburgh Univ., UK (Fernandes, M.M.)
Abstract	Wide-issue ILP machines can be built using the VLIW approach as many of the hardware complexities found in superscalar processors can be transferred to the compiler. However, the scalability of VLIW architectures is still constrained by the size and number of ports of the register file required by a large number of functional units. Organizations composed of clusters of a few functional units and small private register files have been proposed to deal with this problem; an approach highly dependent on scheduling and partitioning strategies. The paper presents DMS, an algorithm that integrates modulo scheduling and code partitioning in a single procedure. Experimental results have shown that the algorithm is effective for configurations up to 8 clusters, or even more when targeting vectorizable loops.
Starting Page	130
Ending Page	134
File Size	64579
Page Count	5
File Format	PDF
ISBN	0769500048
DOI	10.1109/HPCA.1999.744349
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1999-01-09
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	VLIW Computer science Pipeline processing Computer architecture Radio frequency Processor scheduling Registers Microprocessors Clocks Data analysis
Content Type	Text
Resource Type	Article

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