NDLI: A proposal for a DSM architecture suitable for a widely distributed environment and its evaluation

Content Provider	IEEE Xplore Digital Library
Author	Oguchi, M. Aida, H. Saito, T.
Copyright Year	1995
Description	Author affiliation: Fac. of Eng., Tokyo Univ., Japan (Oguchi, M.; Aida, H.; Saito, T.)
Abstract	To realize functionally distributed computing in a wide area distributed environment, distributed shared memory (DSM) is an attractive option due to the simplicity and flexibility in software programming. DSM has mainly been studied in a local environment. In a widely distributed environment, the latency of communication impacts system performance, even if a high bandwidth network is used. DSM models in a widely distributed environment are discussed and evaluated in this paper. First, two existing DSM models are examined: shared virtual memory and replicated shared memory. Next, an innovative replicated shared memory model, which uses internal machine memory, is proposed. A prototype of this model using multi-thread programming was implemented on multi-CPU SPARCstations. These DSM models are compared with SCRAMNet, whose mechanism is based on replicated shared memory. Results from this evaluation show the superiority of the replicated shared memory compared to shared virtual memory when the length of the network is large. While replicated shared memory using external memory is influenced by the ratio of local and global accesses, replicated shared memory using internal machine memory is suitable for a wide variety of cases. The replicated shared memory model is considered to be suitable particularly for applications which impose real time operation in a widely distributed environment, since some latency hiding techniques such as context switching or data prefetching are not effective for real time demands.
Starting Page	32
Ending Page	39
File Size	844398
Page Count	8
File Format	PDF
ISBN	0818670886
ISSN	10828907
DOI	10.1109/HPDC.1995.518692
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-08-02
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Proposals Delay Computer architecture Distributed computing Functional programming System performance Bandwidth Prototypes Context modeling Prefetching
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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