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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Lashkarian, N. Tarn, H. Dick, C. |
| Copyright Year | 2005 |
| Description | Author affiliation: Signal Process. Syst. Eng., Xilinx Inc., San Jose, CA (Lashkarian, N.; Tarn, H.; Dick, C.) |
| Abstract | This paper addresses the problem of peak to average power ratio (PAPR) reduction in multi-band transmitters. Transmitter linearity requirements are addressed and trade-off analysis for design and optimization of the PAPR reduction algorithm within the context of the error vector magnitude (EVM) and adjacent channel leakage ratio (ACLR) quality metrics are studied. Our study also includes mapping of the signal processing algorithms onto Xilinx Virtex-4trade field programmable gate array (FPGA) technology and addresses the device resource utilization and efficient hardware implementation of the above PAPR reduction algorithms onto the above mentioned device. Statistical simulations and performance assessments of the proposed algorithms are presented |
| Starting Page | 2169 |
| Ending Page | 2173 |
| File Size | 210345 |
| Page Count | 5 |
| File Format | |
| ISBN | 0780394143 |
| DOI | 10.1109/GLOCOM.2005.1578048 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-11-28 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Peak to average power ratio Transmitters Field programmable gate arrays Signal processing algorithms Algorithm design and analysis Linearity Design optimization Signal mapping Resource management Hardware |
| Content Type | Text |
| Resource Type | Article |
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