NDLI: Development of chirp signal generator for micro satellite on-board synthetic aperture radar

Content Provider	IEEE Xplore Digital Library
Author	Jinhong An Haewon Jung Heein Yang Sang-Burm Ryu Hyeon-Cheol Lee Sang-Gyu Lee Sang-Soon Yong Jae-Hyun Kim
Copyright Year	2015
Description	Author affiliation: Payload Electron. Team, Korea Aerosp. Res. Inst., Daejeon, South Korea (Sang-Burm Ryu; Hyeon-Cheol Lee; Sang-Gyu Lee; Sang-Soon Yong) \|\| Center for Environ. Remote Sensing, Chiba Univ., Chiba, Japan (Heein Yang) \|\| Dept. of Space Electron. & Inf. Technol., Ajou Univ., Ajou, South Korea (Jinhong An; Haewon Jung; Jae-Hyun Kim)
Abstract	For L-band micro satellite on board SAR system, the suitable chirp signal generator for this system is needed. In this paper, the chirp signal generator with direct digital synthesizer (DDS) is considered instead of the memory map based chirp signal generator. Furthermore, to overcome the limitation of clock frequency of the space component, parallelized DDS (PDDS) method is used. However, phase error is one of the problem to implement DDS chirp signal generator. Therefore, we propose a novel method to compensate this error. As a result, the output performance of the signal is enhanced using the proposed phase error compensation method.
Starting Page	3663
Ending Page	3666
File Size	644631
Page Count	4
File Format	PDF
e-ISBN	9781479979295
DOI	10.1109/IGARSS.2015.7326617
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-07-26
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Chirp Signal generators Satellites Synthetic aperture radar Generators Clocks Bandwidth Phase error Direct digital synthesizer Parallelized DDS Micro satellite
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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