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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Esmaeili, S.E. Al-Khalili, A.J. Cowan, G.E.R. |
| Copyright Year | 2008 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, QC, Canada (Esmaeili, S.E.; Al-Khalili, A.J.; Cowan, G.E.R.) |
| Abstract | In this paper a new approach for skew compensation in energy recovery clock distribution networks is introduced by manipulating the operating speed of the flip-flops. Three types of flip-flops: ¿fast¿, ¿standard¿, and ¿slow¿ are used. Distributing flip-flops according to their delay requirements would reduce the effect of the clock's skew on the outputs of sequentially adjacent flip-flops. This approach increases the skew bounds required by algorithms to balance the skew in the clock distribution network leading to reduced design complexity. Theoretical analysis and simulation results at a clock frequency of 500 MHz show that this approach is feasible and effective where a skew of up to 6.2% of the clock period can be compensated for. |
| Starting Page | 365 |
| Ending Page | 368 |
| File Size | 386636 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424423699 |
| DOI | 10.1109/ICM.2008.5393844 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-12-14 |
| Publisher Place | United Arab Emirates |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Clocks Flip-flops Delay effects Energy consumption Algorithm design and analysis Threshold voltage Microelectronics Analytical models Circuit simulation Frequency skew compensation Clock distribution network energy recovery flip-flop |
| Content Type | Text |
| Resource Type | Article |
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