NDLI: Senior-level embedded system design project using FPGAs

Content Provider	IEEE Xplore Digital Library
Author	Wirthlin, M.J.
Copyright Year	2005
Description	Author affiliation: Brigham Young Univ., Provo, UT, USA (Wirthlin, M.J.)
Abstract	There is a growing need to provide students with meaningful system-level design (SLD) experiences at the undergraduate level. Relevant SLD skills include the ability to integrate IP from third-party providers, create reusable IP (including appropriate documentation), partition system functionality between software and hardware, and properly integrate real-time functions within an operating system. A senior SLD project was created to provide such an experience for undergraduate students. With cooperation from Xilinx corporation, this single semester course provides students the opportunity to learn SLD skills by creating a single-chip multimedia computer system using FPGAs. Students in this class integrate custom IP and third-party IP into a PowerPC-based system within a single FPGA device. The final product is a real-time multimedia computer system providing both audio and video services. This paper describes the SLD course, beginning by outlining its goals and requirements. Next, the hardware and software infrastructure used by the project is described. Finally, the class schedule is reviewed.
Sponsorship	IEEE Comput. Soc. Tech. Comm. on Design Automation IEEE Comput. Soc. Tech. Comm. on Test Technol. IEEE Comput. Soc. Tech. Comm. on VLSI
Starting Page	91
Ending Page	92
File Size	53859
Page Count	2
File Format	PDF
ISBN	0769523749
DOI	10.1109/MSE.2005.49
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-06-12
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Embedded system Field programmable gate arrays Superluminescent diodes Hardware Real time systems Multimedia systems System-level design Documentation Software reusability Software systems
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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