NDLI: A fault-tolerant architecture for ATM networks

Content Provider	IEEE Xplore Digital Library
Author	Chi-Chun Lo Chen-Yu Chiu
Copyright Year	1995
Description	Author affiliation: Inst. of Inf. Manage., Nat. Chiao Tung Univ., Hsinchu, Taiwan (Chi-Chun Lo; Chen-Yu Chiu)
Abstract	The asynchronous transfer mode (ATM) is the transfer mode recommended for B-ISDN by CCITT. In this paper, we propose a self-routing fault-tolerant switching architecture for ATM networks. The proposed architecture uses subswitches and extra links to provide many alternative paths, and hence can tolerate multiple faults. Analytical results show that the number of redundant paths increases exponentially as the size of the network increases. A simulation model is developed to study both the reliability and She performance of the proposed architecture. Reliability analysis shows that this architecture has a much higher fault tolerance than the fault-tolerant ATM networks found in the literature. In addition, the extra paths can be used to route cells when internal cell contention occurs in switching elements. Simulation results also indicate that the proposed architecture maintains a high throughput with acceptable cell delay time, even when the number of faulty components increases.
Starting Page	29
Ending Page	36
File Size	702798
Page Count	8
File Format	PDF
ISBN	0818671629
ISSN	07421303
DOI	10.1109/LCN.1995.527326
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-10-16
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault tolerance Asynchronous transfer mode B-ISDN Switches Throughput Routing Delay effects Multiprocessor interconnection networks Computer networks Information management
Content Type	Text
Resource Type	Article

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