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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Dong-Su Kim Studenkov, P. Forrest, S.R. Lange, M.J. Olsen, G.H. |
| Copyright Year | 1996 |
| Description | Author affiliation: ATC/POEM, Princeton Univ., NJ, USA (Dong-Su Kim) |
| Abstract | Recently, we have demonstrated a monolithic near-infrared FPA in which InGaAs photodiodes, sensitive in the 1.3-1.5 /spl mu/m wavelength spectral region, are integrated with InP junction field-effect transistor (JFET) switches at each pixel. In this array, sources of all the JFETs in each column are connected in parallel and tied to the drain of a column-addressing JFET, while sources of all column-addressing JFETs are connected in parallel at the output. To ensure high sensitivity of such arrays, it is necessary that switching JFETs have very small gate and channel leakage, since leakage currents of an entire column of pixels add up at the output, thereby limiting the maximum array dimensions and sensitivity. To minimize channel leakage, a novel JFET design was employed which is described in this paper. |
| Starting Page | 275 |
| Ending Page | 276 |
| File Size | 175931 |
| Page Count | 2 |
| File Format | |
| ISBN | 0780331605 |
| DOI | 10.1109/LEOS.1996.571658 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1996-11-18 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Indium phosphide JFETs Voltage FETs Leakage current PIN photodiodes Temperature measurement Indium gallium arsenide Geometry P-n junctions |
| Content Type | Text |
| Resource Type | Article |
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