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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Quang Huy Nguyen Ken Yoong Lee Myo Tun Aung Bretschneider, T. McLoughlin, I. |
| Copyright Year | 2009 |
| Description | Author affiliation: School of Computer Engineering Nanyang Technological University N4-02a-32, Nanyang Avenue, Singapore 639798 (Quang Huy Nguyen; McLoughlin, I.) || EADS Innovation Works Singapore 41 Science Park Road #01-30 The Gemini Science Park II, Singapore 117610 (Ken Yoong Lee; Myo Tun Aung; Bretschneider, T.) |
| Abstract | From the literature review, there are two constant false alarm rate detectors for detecting edges in multi-look fully polarimetric synthetic aperture radar (POLSAR) imagery, namely the likelihood ratio edge detector [1] and the Roy's largest eigenvalue-based edge detector [2]. In the latter approach, one major restriction is the computation complexity, i.e. in the context of the chosen C language-based implementation. Thus, in this paper, a novel hardware-based architecture is presented to improve the processing time for the Roy's largest eigenvalue-based edge detection. The algorithm was implemented in a field-programmable gate array (FPGA) with an accelerated solution targeting data rates of up to 1 Gb/s. Its performance was examined using nine-look NASA/JPL C-band data and evaluated in terms of processing speed and accuracy as compared to the C language-based implementation on a personal computer (PC) with a $Core^{TM}$ 2 Duo processor clocked at 2.2 GHz. |
| File Size | 361253 |
| File Format | |
| ISBN | 9781424433940 |
| DOI | 10.1109/IGARSS.2009.5417338 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-07-12 |
| Publisher Place | South Africa |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Image edge detection Polarimetric synthetic aperture radar Radar detection Detectors Field programmable gate arrays Computer architecture Acceleration NASA Microcomputers Clocks Roy's largest eigenvalue Real-time system field programmable gate arrays edge detection floating point |
| Content Type | Text |
| Resource Type | Article |
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