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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Renlong Wang Yanling Hao Jin Xi |
| Copyright Year | 2008 |
| Description | Author affiliation: Coll. of Autom., Harbin Eng. Univ., Harbin (Renlong Wang; Yanling Hao; Jin Xi) |
| Abstract | A sort of arithmetic for wavelet embedded block coding based on low memory and block bit-length search is brought forward in this article. The memory occupancy can be reduced through four measures which adopted in the arithmetic in the process of coding and coding efficiency can be increasingly improved, respectively. The four measures mentioned above are: (1)LLn sub-band separate coding; (2)Establish block bit-length chart, the bit-length is defined by the author; (3)Save the space of memory by employing bit-length chart instead of using lists; (4)Swift search key blocks according to the construction of bit-length chart to overcome repeat scan and increase the coding speed. According to the experimental results, the arithmetic can reduce memory occupancy in the process of coding and increase the coding speed effectively, meanwhile, it can keep the high quality of PSNR. It has great availability in hardware design for wavelet coding. |
| Starting Page | 3783 |
| Ending Page | 3788 |
| File Size | 1362871 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424421138 |
| DOI | 10.1109/WCICA.2008.4593532 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-06-25 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Encoding Automation Hardware Optimization Availability PSNR Construction industry embedded block coding bit-length chart block bit-length memory optimization |
| Content Type | Text |
| Resource Type | Article |
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