NDLI: An approach for microsystems codesign

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Microprocessors for the years 2001 and 2008: Where will we be in 2001? What will still need to be done for 2008?

Micro-architecture estimation of the useless power consumption of a high-performance processor

A bit scalable architecture for fuzzy processors

Designing a Java microcontroller to specific applications

Advanced compact model for the charges and capacitances of short-channel MOS transistors

Conductances and noise in trapezoidal association of transistors for analog applications using a SOT methodology [in CMOS]

Multilevel finite difference methods for the characterization of substrate coupling in deep sub-micron designs

Estimating functional unit number in the PISH codedesign system by using Petri nets

Codesign system performance based on memory configurations

Hardware/software specification, design and test using a system level approach

An approach for microsystems codesign

A multi-functional cell for CMOS analog applications in low-voltage

Optimum design of MOS amplifiers

Odd-order current-mode lowpass filters with finite zeros

An approach for interface generation in the PISH co-design system

Interface design and refinement using state-based techniques

Register files constraint satisfaction during scheduling of DSP code

A binary-tree architecture for scheduling real-time systems with hard and soft tasks

An 0.25 /spl mu/m CMOS injection locked 5.6 Gb/s clock and data recovery cell

A 9-bit parallel pipelined multiplier based on the 3-bit recoding from Booth's algorithm

MCA: a single chip one-port scalable ATM layer controller

Symbolic model checking in practice

Circuit-level considerations for mixed signal programmable components

Fault detection in systems with 2nd order dynamics using transient analysis

A low sensitivity switched-capacitor filter design with testability features

Reusing hardware components with single-state processes

High speed FIR filters for digital decimation

A FPGA version of a non-linear adaptive filter

Power optimization using dynamic power management

Logic and high level synthesis for communication protocols

System synthesis and processor selection in the S/sup 3/E/sup 2/S environment

Fast hardware compilation of behaviors into an FPGA-based dynamic reconfigurable computing system

An architect's workbench for reconfigurable computing

Test escapes: analysis of short defect

Effects of radiation on digital architectures: one year results from a satellite experiment

Criteria for static current estimation: how good are they? An approach incorporating IC quality requirements

On-line test of a switching circuit

Covering strategies for library free technology mapping

A tool for analysis of universal logic gates functionality

Project management and design methodology support for the Cave Project: a hyperdocument-centric approach

Solving satisfiability in combinational circuits with backtrack search and recursive learning

Comparison between quasi-uniform linear cellular automata and linear feedback shift registers as test pattern generators for built-in self-test applications

Implementing a self-testing 8051 microprocessor

Design for testability reuse in synthesis for testability

Semiconductor knowledge management and soft-core reuse

Specification and design of an Ethernet interface soft IP

SCOB, a soft-core for the Blowfish cryptographic algorithm

Testing semiconductor chips: trends and solutions

An approach for microsystems codesign

Content Provider	IEEE Xplore Digital Library
Author	Ribas, R.P. Behrens, F.H.
Copyright Year	1999
Description	Author affiliation: Inst. de Inf, PUC Campinas, Sao Paulo, Brazil (Ribas, R.P.)
Abstract	The increasing interest in microsystems technology or MEMS (Micro-Electro-Mechanical Systems) is a result of the progress in the integrated circuit (IC) fabrication domain, in the last decades. Nowadays, a great effort is being made to construct non-electrical parts on a single chip in order to obtain monolithic multi-functional smart sensors. For this, the CAD tools must also support such a multi-domain design environment, including from system behavior description and simulation to a unified layout construction. An approach to microsystems codesign is presented, and some back-end tools (layout level) such as layout generators, cross-section and 3D viewers, and etching simulators are already available.
Starting Page	46
Ending Page	49
File Size	95495
Page Count	4
File Format	PDF
ISBN	076950387X
DOI	10.1109/SBCCI.1999.802965
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1999-10-02
Publisher Place	Brazil
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Books Grounding Electronic equipment Power systems Integrated circuit technology Micromechanical devices Microelectromechanical systems Fabrication Intelligent sensors Design automation
Content Type	Text
Resource Type	Article

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