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Content Provider | IEEE Xplore Digital Library |
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Author | Sarmiento-Reyes, A. Gutierrez-de Anda, M.A. Champac, V.H. |
Copyright Year | 1998 |
Description | Author affiliation: Inst. Nacional de Astrofisica, Opt. y Electron., Puebla, Mexico (Sarmiento-Reyes, A.) |
Abstract | The diagnosability of analogue circuits can be assessed in terms of the interconnection pattern of the network, because faulty components introduce ill-conditions to the KVL and KCL equations, i.e. in the set of constraints of the topology. In this work, a CAD tool based on graph theory concepts is used to establish the current and voltage graphs of the circuit to be diagnosed. The tool achieves a classification of the circuit components by resorting to the kinds of electrical variables that are known or measured. From this information, several complicated graph operations are very easily executed by the program, and the above mentioned graphs are obtained. |
Starting Page | 179 |
Ending Page | 182 |
File Size | 63889 |
Page Count | 4 |
File Format | |
ISBN | 0818687045 |
DOI | 10.1109/SBCCI.1998.715436 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 1998-10-03 |
Publisher Place | Brazil |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Integrated circuit interconnections Circuit faults Kirchhoff's Law Voltage Resistors Equations Extraterrestrial measurements Circuit topology Circuit theory Scholarships |
Content Type | Text |
Resource Type | Article |
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