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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Riley, K.J. Hummels, D.M. Irons, F.H. Rundell, A. |
| Copyright Year | 1999 |
| Description | Author affiliation: Maine Univ., Orono, ME, USA (Riley, K.J.) |
| Abstract | High accuracy Digital to Analog Converters (DACs) are becoming increasingly important as the use of digital signal processing in communications becomes more common. DACs translate a digital sequence into an analog current or voltage output. This translation is not ideal and the DAC introduces some harmonic error at its output. This paper develops a model for DAC harmonic error explores a lowpass calibration scheme for measuring DAC errors, and develops a scheme for compensation of these errors. Simulated results reveal the system is capable of compensating dynamic DAC errors that produce energy in the lowpass calibration band. Hardware results show that harmonic distortion is reduced using this compensation scheme, but some dynamic errors present in the DAC produce little energy in the calibration band and are not compensated. |
| Starting Page | 1310 |
| Ending Page | 1315 |
| File Size | 503545 |
| Page Count | 6 |
| File Format | |
| ISBN | 0780352769 |
| ISSN | 10915281 |
| DOI | 10.1109/IMTC.1999.777066 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1999-05-24 |
| Publisher Place | Italy |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Digital-analog conversion Calibration Power system modeling Table lookup Iron Analog computers Sequences Voltage Power harmonic filters Distortion measurement |
| Content Type | Text |
| Resource Type | Article |
| Subject | Instrumentation Electrical and Electronic Engineering |
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