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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Lappalainen, V. Hamalainen, T.D. |
| Copyright Year | 2002 |
| Description | Author affiliation: Nokia Res. Center, Tampere, Finland (Lappalainen, V.) |
| Abstract | A unified method for optimization of video coding algorithms on general-purpose processors is presented. The method consists of algorithmic, code, compiler, and SIMD (Single Instruction Multiple Data) media Instruction Set Architecture (ISA) optimizations. H.263, H.263+ and emerging H.26L are used as example cases. For the realization of the unified method, the coding elements in all the codecs are analyzed and optimization techniques suitable for one or several of all the coding elements are presented. Results show that a nine-fold improvement can be obtained in H.26L decoding speed in terms of frames per second with video quality equivalent to a non-optimized implementation. |
| Sponsorship | IEEE Comput. Soc |
| Starting Page | 431 |
| Ending Page | 438 |
| File Size | 332362 |
| Page Count | 8 |
| File Format | |
| ISBN | 0769515061 |
| DOI | 10.1109/ITCC.2002.1000428 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2002-04-08 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Optimization methods Video coding Optimizing compilers Instruction sets Video codecs Discrete cosine transforms Video compression Streaming media Laboratories Computer architecture |
| Content Type | Text |
| Resource Type | Article |
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