NDLI: Implementation of (255, 251) Reed Solomon Minimal Instruction Set Computing using Handel-C

Content Provider	IEEE Xplore Digital Library
Author	Jia Jan Ong Ang, L.-M. Seng, K.P. Fong Tien Ong
Copyright Year	2011
Description	Author affiliation: Department of Electrical and Electronic, The University of Nottingham Malaysia, Semenyih, Malaysia (Jia Jan Ong; Ang, L.-M.; Seng, K.P.; Fong Tien Ong)
Abstract	Reed Solomon is used to protect the data transmitted across the communication channel. However, the Reed Solomon encoder and decoder consume a significant amount of power. Besides, there is a significant increase in hardware component of the communication device, with encoder and decoder circuits integrated to it. These two factors give raise to the cost of manufacturing the devices. Based on the Minimal Instruction Set Computing, a Reed Solomon Minimal Instruction Set Computer processor was developed. The processor was programmed to operate as a (255, 251) Reed Solomon decoder. This decoder has a simple circuit and can perform the similar operations as the usual Reed Solomon decoder implemented.
Starting Page	429
Ending Page	434
File Size	463396
Page Count	6
File Format	PDF
ISBN	9781612846613
ISSN	19767684
e-ISBN	9781612846637
DOI	10.1109/ICOIN.2011.5723123
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-01-26
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Decoding Reed-Solomon codes Registers Encoding Computers Galois fields Polynomials Minimal Instruction Set Computing Reed Solomon
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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