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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | de Garis, H. |
| Copyright Year | 2002 |
| Description | Author affiliation: Dept. of Comput. Sci., Utah State Univ., Logan, UT, USA (de Garis, H.) |
| Abstract | This paper concerns a case study of the limits to which desirable properties can be evolved in a particular kind of neural network circuit (module). It has been the decade long dream of the author to evolve neural network modules in their 10,000s at electronic speeds in special evolvable hardware, and then to assemble them into a gigabyte of memory to build artificial brains. But such an dream is only realizable if the (modular) evolvable capacities (MECs) of such modules (i.e. a qualitative and quantitive measure of the quality of the evolution) are sufficiently high to make the effort worthwhile. This paper shows how the evolvable capacities of a module using a new neural network model (called DePo) was stretched to its limits. This paper makes the claim that evolutionary engineering is all about "pushing up MECs". |
| Sponsorship | IEEE IEEE Neural Networks Soc. IEE Evolutionary Programming Soc |
| Starting Page | 454 |
| Ending Page | 459 |
| File Size | 686157 |
| Page Count | 6 |
| File Format | |
| ISBN | 0780372824 |
| DOI | 10.1109/CEC.2002.1006277 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2002-05-12 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Biological neural networks Artificial neural networks Circuits Hardware Computer science Field programmable gate arrays Read-write memory Robotic assembly Brain modeling Cellular phones |
| Content Type | Text |
| Resource Type | Article |
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