NDLI: A very large scale integrated circuits design laboratory for undergraduates

Content Provider	IEEE Xplore Digital Library
Author	Erickson, G. Daniels, P. Clark, R.
Copyright Year	1993
Description	Author affiliation: Seattle Univ., WA, USA (Erickson, G.; Daniels, P.)
Abstract	The very large scale integrated circuit design course at Seattle University is discussed, with reference to the different kinds of software used since the course's inception in 1987. The first time the course was taught students used schematic capture to design and simulate their project. This is a laborious and time consuming method of design, but the students were enthusiastic about the possibility of designing large circuits. The next time the course was taught the students had access to a program called "Finesse" which is part of the Chipcrafter program. This program allowed the students to input their designs as a truth table. This was very much faster and simpler than schematic design and the students were very happy with the reduced design time. The "Finesse" systm of design was followed by the adoption of the Verilog hardware description language. Verilog seems to be very easy for the students to learn and use.<>
Starting Page	419
Ending Page	421
File Size	263745
Page Count	3
File Format	PDF
ISBN	0780314824
DOI	10.1109/FIE.1993.405489
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1993-11-06
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration Laboratories Integrated circuit synthesis Hardware Silicon Education Educational programs Proposals Educational institutions Sun
Content Type	Text
Resource Type	Article

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