NDLI: Discrepancy and the Power of Bottom Fan-in in Depth-three Circuits

Content Provider	IEEE Xplore Digital Library
Author	Chattopadhyay, A.
Copyright Year	2007
Description	Author affiliation: McGill Univ., Montreal (Chattopadhyay, A.)
Abstract	We develop a new technique of proving lower bounds for the randomized communication complexity of boolean functions in the multiparty 'number on the forehead' model. Our method is based on the notion of voting polynomial degree of functions and extends the degree-discrepancy lemma in the recent work of Sherstov (2007). Using this we prove that depth three circuits consisting of a MAJORITY gate at the output, gates computing arbitrary symmetric function at the second layer and arbitrary gates of bounded fan-in at the base layer i.e. circuits of type MAJ o SYMM o $ANY_{O(1)}$ cannot simulate the circuit class $AC^{0}$ in sub-exponential size. Further, even if the fan-in of the bottom ANY gates are increased to o(log log n), such circuits cannot simulate $AC^{0}$ in quasi-polynomial size. This is in contrast to the classical result of Yao and Beigel-Tarui that shows that such circuits, having only MAJORITY gales, can simulate the class $ACC^{0}$ in quasi-polynomial size when the bottom fan-in is increased to poly-logarithmic size. In the second part, we simplify the arguments in the breakthrough work of Bourgain (2005) for obtaining exponentially small upper bounds on the correlation between the boolean function $MOD_{q}$ and functions represented bv polynomials of small degree over $Z_{m},$ when m,q ges 2 are co-prime integers. Our calculation also shows similarity with techniques used to estimate discrepancy of functions in the multiparty communication setting. This results in a slight improvement of the estimates of Bourgain et al. (2005). It is known that such estimates imply that circuits of type MAJ o $MOD_{m}$ o $AND_{isin}$ $_{log}$ $_{n}$ cannot compute the $MOD_{q}$ function in sub-exponential size. It remains a major open question to determine if such circuits can simulate $ACC^{0}$ in polynomial size when the bottom fan-in is increased to poly-logarithmic size.
Starting Page	449
Ending Page	458
File Size	271446
Page Count	10
File Format	PDF
ISBN	9780769530109
ISSN	02725428
DOI	10.1109/FOCS.2007.30
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-10-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit simulation Polynomials Computer science Forehead Computational modeling Boolean functions Complexity theory Voting Upper bound Scholarships
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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