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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Xiao Shi Jianhui Wu Zhilin Liu |
| Copyright Year | 2013 |
| Description | Author affiliation: Nat. ASIC Res. Center, Southeast Univ., Nanjing, China (Xiao Shi; Jianhui Wu; Zhilin Liu) |
| Abstract | This paper presents the design of a double balanced current-mirror mixer with current reusing technique. The proposed mixer is based on high linearity current mirror structure which guarantees a high IIP3. To improve the power efficiency of the current mirror structure, a current reusing technique is used to share the bias current of the transconductance stage and the output stage. Compared with the traditional current mirror mixer, a power decrease of 36% can be achieved. The mixer is designed in 0.13-μm 1P8M RFCMOS process; operating at the frequency of 1GHz. Simulation results indicate a peak conversion gain of 12.6dB, a relatively high IIP3 of 4.0dBm and a moderate NF of 16dB. The whole mixer has a power consumption of 3.84mW under 1.2V supply voltage. |
| Sponsorship | IEEE Ukraine Sect. |
| Starting Page | 409 |
| Ending Page | 412 |
| File Size | 266057 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781467346696 |
| e-ISBN | 9781467346726 |
| DOI | 10.1109/ELNANO.2013.6552002 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-04-16 |
| Publisher Place | Ukraine |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Resistors Switches Mixer Current mirror Mixers Folded structure Radio frequency CMOS Linearity High linearity Logic gates Mirrors Current reusing |
| Content Type | Text |
| Resource Type | Article |
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